Sealing Dispensing for MEMS Wafer Capping papers presented at IWLPC
October 31, 2012 - United States Of America
Nordson ASYMTEK, a leader in dispensing, coating, and jetting technologies, will present the papers “Sealing Dispensing for MEMS Wafer Capping,” by Heakyoung (Jaynie) Park, and “Wafer Spray Coating for Pre-applied Underfill,” by Akira Morita, at IWLPC 2012, San Jose, CA, November 11th and 12th in Sessions 3 and 10.
MEMS devices have unique packaging requirements, in particular, because of their fragility. Wafer capping is one packaging method that is gaining popularity because it provides protection for the MEMS device from the dicing process. In addition, wafer capping can provide a vacuum within the MEMS structure and a hermetic seal can be formed. In her presentation, “Sealing Dispensing for MEMS Wafer Capping,” Ms. Park explains the challenges involved in MEMS packaging and wafer capping technology, and reviews requirements for dispensing sealant, volumetric accuracy, and motion systems to meet packaging trends.
Mr. Morita will explain the structure of the 3D package, the two types of underfill required by this package structure, along with the technologies used to apply the underfill. These packages have very tight bump pitch and height between the stacked die which make the conventional underfill processes, like capillary and molded, difficult. In addition, chip-on-wafer stacking needs very tight die placement between side-by-side dies, making it hard for underfill to penetrate through the tight die placement after bonding. As a result, pre-applied underfill is gaining attention.
The presentation “Wafer Spray Coating for Pre-applied Underfill” addresses pre-applied underfill challenges and requirements, coating technology options and comparisons, and the best apparatus to use for completing the underfill process. Using experience gained from conformal coating and jet dispensing has enabled development of a process of wafer spray coating for pre-applied underfill application because it can address the thickness consistency and material wastage challenges.
The International Wafer-Level Packaging Conference (IWLPC) brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging.
MEMS devices have unique packaging requirements, in particular, because of their fragility. Wafer capping is one packaging method that is gaining popularity because it provides protection for the MEMS device from the dicing process. In addition, wafer capping can provide a vacuum within the MEMS structure and a hermetic seal can be formed. In her presentation, “Sealing Dispensing for MEMS Wafer Capping,” Ms. Park explains the challenges involved in MEMS packaging and wafer capping technology, and reviews requirements for dispensing sealant, volumetric accuracy, and motion systems to meet packaging trends.
Mr. Morita will explain the structure of the 3D package, the two types of underfill required by this package structure, along with the technologies used to apply the underfill. These packages have very tight bump pitch and height between the stacked die which make the conventional underfill processes, like capillary and molded, difficult. In addition, chip-on-wafer stacking needs very tight die placement between side-by-side dies, making it hard for underfill to penetrate through the tight die placement after bonding. As a result, pre-applied underfill is gaining attention.
The presentation “Wafer Spray Coating for Pre-applied Underfill” addresses pre-applied underfill challenges and requirements, coating technology options and comparisons, and the best apparatus to use for completing the underfill process. Using experience gained from conformal coating and jet dispensing has enabled development of a process of wafer spray coating for pre-applied underfill application because it can address the thickness consistency and material wastage challenges.
The International Wafer-Level Packaging Conference (IWLPC) brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging.